2.4. The CSG 4567 System/Video Controller 2.4.1. Description The CSG 4567 is a low-cost high-peformance system/video controller, designed to be used in a wide variety of low-end home-computer type systems ranging from joystick controlled video games to high-end home-productivity machines with built-in disk drives and monitor. The 4567 was designed with Commodore-64 (C64) architecture as a subset of its advanced features. In addition to having all of the C64 video modes, it also supports the character attributes -- blink, bold, reverse video, and underline, and can display any of the new or old video modes in 80 column or 640 horizontal pixel format, as well as the older 40 column 320 pixel format. A new "bitplane" video mode was added to allow the displaying of true bitplane type video, with up to eight bitplanes in 320 pixel mode and up to four in 640 pixel mode. The 4567 can also time-multiplex the bitplanes to give a true four-color 1280 pixel picture. Vertical resolution is maintained at 200 lines as standard, but can be doubled to 400 with interlace. 2.4.2. CSG 4567 Pin Assignments 2.4.3. CSG 4567 Operation (look into the full Manual) 2.4.4. Programming the new VIC (4567) The C4567R6 is a high performance single chip video controller designed to bring exceptional graphics to low cost computer and game systems. It presently is available in NTSC and PAL versions to match European and North American television standards. The following are new features that are added as a superset of the old VIC-II video controller functions incorporated in the C4567R6. a. NewVic mode b. 80 column character and 640 horizontal pixel mode c. Scan interlace and 400 line mode d. Character attributes (blink, highlight, underline, reverse). e. Fast clock mode (3.58 vs. 1.02 MHz) f. Bitplane mode g. Color palettes h. Additional ROM i. 1280H pixel mode j. Display Address Translator (DAT) k. Horizontal and vertical positioning 1. External sync (Genlock) m. Alternate character set n. Chroma killer NewVic Mode After power-up and reset, the C4567R6 performs as if it were the "old" VIC chip. In this mode, none of the new features are accessible. The old VIC II registers appear at addresses $D000-$D3FF, echoed 16 times, every 64 addresses, and any new registers within the 64 byte block will not exist. To put the C4567R6 into "NewVic" mode, the user must write first an $A5 and then a $96 to the KEY register ($D02F). Once these values have been entered the C4567R6 will be in "NewVic" mode, and access to the "NewVic" registers and modes will be possible. To take the C4567R6 out of "NewVic" mode, simply write any value to the KEY register. After doing this, all of the new modes will be disabled. The registers that were programmed in "NewVic" mode will retain their current values. It should be noted, however, that since all old modes are available in new mode, there is little reason to exit new mode. 80 Column (character) or 640 Pixel (bitmap or bitplane) Mode. You can put the C4567R6 into "80 Column Mode" or "640 horizontal pixel mode" by setting the H640 bit in control register "B". The normal horizontal rendering is 40 columns or 320 pixels. In 80 column character mode, several things change. The Video Matrix becomes 2K bytes long, where it used to be 1K in 40 column mode. The character color RAM also becomes 2K bytes long. The locations of these areas do not change from the prior convention, except that the low order video matrix address bit is not used in 80 column mode. Where the programmer used to have 16 choices for locating the Video Matrix within a video bank, in 80 column mode there are only 8 choices. Although the color RAM doubles in size to 2K bytes, the area provided for color RAM in the I/O map only allows for 1K of color RAM. To read or write the second 1K of color RAM requires that you move CIA1, CIA2, I/O1, and I/O2 out of the way. To do this, set the "COLOR RAM @DC00" bit in Control Register "A". In 640 pixel bitmap mode, similar changes occur. The video matrix and color RAM double in size and are positioned in the memory map exactly as is done in 80 column character mode. The bitmap must now also double in size from 8K to 16K bytes. Because the total memory that the video matrix and the bitmap would require now exceeds the normal 16K byte video bank size, the video bank size has been doubled from 16K to 32K for the bitmap only. The least significant video bank bit is ignored, and the high order character generator bank bit selects which half of the 32K video bank that bitmaps will be fetched from. The video matrix is still fetched from the normal 16K video bank. In 80 column or 640 pixel mode, the sprite pointers are at the end of the 2K byte video matrix, where they used to be at the end of the 1K byte video matrix, in 40 column or 320 pixel mode. The size, location, and resolution of sprites are not affected by any of the mode switches. Interlace, and 400 Line Vertical mode The C4567R6 can interlace scan lines to give a true NTSC, 525 line screen (625 lines on PAL versions), although the default, however, is a 262 line non-interlaced screen (312 lines on PAL versions). Set the INT bit in control register "B" to a "1" if you want interlacing. The C4567R6 can also give a 400 line vertical resolution, which is useful in the new Bitplane mode. Set the V400 bit, and the INT bit in control register "B" to a "1" to enable 400 line bitplanes. (see Bitplanes, below) The V400 switch will have no effect if the display is not interlacing. Also, although interlacing is permitted in all of the old video modes, the same data will appear on both odd and even rasters, even if the V400 switch is on. 1280 Horizontal Pixel mode The C4567R6 supports ultra-high resolution graphics by permitting the programmer to use 1280 pixel lines. This is enabled by setting the H1280 and H640 bits in control register "B" to a "1". The 1280 pixels are acheived by time-multiplexing bitplane bits. This is done by substituting the pixel clock for bitplane 7. This means that for the first half of each pixel, the color palette will be fed the normal color index. For the second half of the same pixel, it will fed the normal index, plus 128. To utilize this feature, the user must program the color palette to perform the multiplexing function. The H1280 bit can also be set H640 off. This is a unique mode that allows the use of 320 and 640 horizontal pixel bitplanes simultaneously. Character Attributes In NewVic mode, the C4567R6 supports four new character attributes which can be enabled by setting the ATTR bit in Control Register "B". These are Blink, Highlight, Underlined, and Reverse Video characters. Any combination of these attributes can be enabled on a character by character basis, at any time. Certain combinations will have varying effects. (See table below) Attributes can also be applied to bitmap mode, and, to a limited extent, to the new bitplane mode. (see Bitplanes, below) Blink is enabled by setting bit 4 of the Color RAM location for each character requiring this attribute. The Blink attribute will either flash the character on and off, or will alternately enable and disable the other attributes, if any are selected. The blink rate is approximately 1 Hz. Reverse Video is enabled by setting bit 5 of the Color RAM location for each character requiring this attribute. Reverse Video is achieved by simply complementing the character image data for each character with this attribute. If the character is also underlined, the underline will be reversed, as well. Highlighted characters also will reverse. Blink, if enabled, will alternately enable and disable this attribute. Highlight is enabled by setting bit 6 of the Color RAM location for each character requiring this attribute. Highlight is achieved by adding 16 to the color index value. As in the past, the character color is determined by the index value stored in bits 0-3 of the color RAM. In many respects, bit 6 is merely another color select bit. What differs is that the Blink attribute can be used to blink between the "normal" color, and the "highlight" color. Both the character image, and its background can have unique highlight colors. To use the highlight attribute, effectively, color palette locations 16 through 31 should be programmed to "highlight" colors. (see Palette, below). Highlight colors don't have to be related to normal colors, but can be anything. Underline is enabled by setting bit 7 of the Color RAM location for each character requiring this attribute. Underline is accomplished by forcing "1" character image data on the eighth raster line for each character with this attribute. If the Blink attribute is also selected, the underline will blink. Summary of Character Attributes and their Effects Underline Hilite Reverse Blink Effect --------- ------ ------- ----- ----------------------- off off off off normal character off off off on blinking character off off on off reverse video character off off on on alternate reverse/normal off on off off highlight character off on off on alternate highlight/normal off on on off highlight, reverse video off on on on alternate highlight-reverse/normal on off off off underlined character on off off on normal char with blinking underline on off on off underlined reverse-video on off on on alternate underline-reverse/normal on on off off highlight underlined character on on off on alternate highlight-underline/normal on on on off highlight underlined reversed on on on on alternate hilite-underlined-rev/normal Fast Clock To permit the new system to run certain types of the old C64 software, the C4567R6 provides a normal (slow) CPU clock with a long term (63us) average of 1.02 Mhz (exactly the C64 clock rate). This is accomplished by setting up a pattern of 1.79Mhz (560ns) cycles to give a total of 65 cycles be horizontal scanning line (also, like C64). In addition/logic is provided on the C4567R6 to determine when the microprocessor chip is executing an enhanced opcode, and, if so, subtracts a clock cycle from it. By setting the FAST bit in Control Register "B", you can instruct the C4567R6 to clock the CPU at 3.58 Mhz, and permit the microprocessor to execute its enhanced instructions at full speed. This can increase CPU speed up to 400%. BitPlane mode In addition to the usual video modes provided by the old VIC chip, the C4567R6 provides a bitpiane mode, which allows up to eight bitplanes to be used in the 320, or up to four bitplanes to be used in the 640 horizontal pixel modes. Enabling BitPlane mode is done by setting the BPM bit in Control Register "B". Doing this will override all of the other video modes. To specify which bitplanes (0-7) to use, set the corresponding bit for each bitplane you want, in the Bitplane Enable register. Bitplane mode may be used with sprites. Bitplane 2 is the foreground/background plane used for sprite/background collision detection and priority. The bitplanes, whether enabled, or not, provide the eight color value bits used to define what color will be displayed for any pixel on the screen. Bitplane 0 provides the least significant bit of the color value, and bitplane 7 provides the most significant bit. Bitplanes that are not enabled will contribute a "0" to their bit position in the color select code, unless the complement bit for that bitplane, in the complement register, is set. Any bitplane's data can be inverted, whether or not the bitplane is enabled by setting its respective bit in the Bitplane Complement register. Inversion on unenabled bitplanes will cause them to contribute a "1" instead of their usual "0". In BitPlane mode, the C4567R6 does not use the Video Bank select bits, like the old VIC chip did. Instead, you can specify which 8k block (in 320 mode), or which 16k block (in 640 mode) of memory you want a bitplane to come out of. Specify where you want the bitplanes to be fetched from, using Bitplane Address registers 0 through 7. Note, however, that the least significant bits of these registers are ignored in 640 pixel mode, and that register 4 through 7 are never used in 640 pixel mode. Even numbered bitplanes can only be fetched from memory bank 0 (addresses 0-FFFF hex), and odd numbered bitplanes can only be fetched from memory bank 1 (addresses 10000-1FFFF hex). So, the bitplane pointers define which section within the confined bank that bitplane data will be fetched from. In the Bitplane address registers, there are two bit-fields. One field of bits is for the even vertical scan, and the other field of bits is for the odd scan. The odd scan bits are not used unless both INT and V400 bits are set in control register "B". Attributes can be enabled in bitplane mode by setting the ATTR bit in control register "B". If this is done, the most significant nybble of bytes fetched for bitplane 3 will contain the attribute specification for each 8 by 8 pixel cell, exactly as is done in character modes. One exception is that the "hilite" attribute will be disabled. The attributes are only applied to bitplane 2, which is also the foreground/background plane for sprite collisions and priority purposes. To properly utilize this feature, bitplane 2 must be enabled to provide attributed bitplane data, and bitplane 3 must be disabled, since it will be providing attribute data. Data fetches for the attribute data will occur, because bitplanes 2 and 3 are both fetched in the same memory cycle. You may also enable any other bitplanes as needed. Bitplane 2, and any other bitplane may be complemented, but complementing bitplane 3 will only cause its bit weight to contribute a "1", and will not invert the attribute data. Note: Addresses 1F800-1FFFF hex are the Color and Attribute RAM used in the old video modes. You can use this area for bitplane if you do not plan on switching between old and new video modes and expect the data for both modes to be there. Color Palette The C4567R6, allows the programmer to use the sixteen standard "C64" colors, or define up to 256 custom colors and/or use the palette to perform boolean operations on the bitplane data. The C4567R6 incorporates a 16 word palette ROM and a has a 256 word palette RAM. Each palette location is an index, which can specify one of sixteen possible intensity values (4 bits) each, of Red, Green, and Blue primary colors, plus a single control bit (FGBG) which can be used for foreground/background control for video mixing applications, or to drive a separate monochrome screen. The first 16 locations of the palette default to the C64 colors in ROM. The remaining 240 locations are programmable RAM. The first 16 locations can also be replaced with RAM, however, by setting the PAL bit in control register "B". All old video modes, including sprites and exterior, can only access the lowest 16 palette locations (except hilite cells), so you may want to reserve these indices for such features. Only bitplane mode can make full use of all palette locations. Even when less than eight bitplanes are used, the bitplane complement bits of the unused bitplanes can be used to specify which part of the palette is to be used. This feature allows the programmer to define multiple sub-palettes, which can be switched between quickly, or to specify an offset in the color table for the bitplanes, allowing separate colors for exterior and sprites. To set the color palette, the user must simply write to the color palette RAM. Addresses D100-D1FF (hex) program the 256 Red values, addresses D200-D2FF (hex) program the 256 Green values, and addresses D300-D3FF(hex) program the 256 Blue values. All 256 locations of both the blue and green palettes are only 4 bits wide, so the upper four data bits do nothing. Bit 4 of every red palette location is the FGBG programming bit, the remaining 3 bits are not used. The palette locations are not readable by the CPU. C4567R6 Registers MEMORY MAP SELECT AND ENABLE REGISTERS -------------------------------------- (EN BIT MUST BE 1 FOR SELECT TO BE 0) "4510" PORT +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | | EN2 | EN1 | EN0 | 0000 +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | | CHREN | HIRAM | LORAM | 0001 +-------+-------+-------+-------+-------+-------+-------+-------+ VIC-II MODE REGISTERS +-------+-------+-------+-------+-------+-------+-------+-------+ $D000+ | S0X7 | S0X6 | S0X5 | S0X4 | S0X3 | S0X2 | S0X1 | S0X0 | 00 SPRITE 0 X +-------+-------+-------+-------+-------+-------+-------+-------+ | S0Y7 | S0Y6 | S0Y5 | S0Y4 | S0Y3 | S0Y2 | S0Y1 | S0Y0 | 01 SPRITE 0 Y +-------+-------+-------+-------+-------+-------+-------+-------+ | S1X7 | S1X6 | S1X5 | S1X4 | S1X3 | S1X2 | S1X1 | S1X0 | 02 SPRITE 1 X +-------+-------+-------+-------+-------+-------+-------+-------+ | S1Y7 | S1Y6 | S1Y5 | S1Y4 | S1Y3 | S1Y2 | S1Y1 | S1Y0 | 03 SPRITE 1 Y +-------+-------+-------+-------+-------+-------+-------+-------+ | S2X7 | S2X6 | S2X5 | S2X4 | S2X3 | S2X2 | S2X1 | S2X0 | 04 SPRITE 2 X +-------+-------+-------+-------+-------+-------+-------+-------+ | S2Y7 | S2Y6 | S2Y5 | S2Y4 | S2Y3 | S2Y2 | S2Y1 | S2Y0 | 05 SPRITE 2 Y +-------+-------+-------+-------+-------+-------+-------+-------+ | S3X7 | S3X6 | S3X5 | S3X4 | S3X3 | S3X2 | S3X1 | S3X0 | 06 SPRITE 3 X +-------+-------+-------+-------+-------+-------+-------+-------+ | S3Y7 | S3Y6 | S3Y5 | S3Y4 | S3Y3 | S3Y2 | S3Y1 | S3Y0 | 07 SPRITE 3 Y +-------+-------+-------+-------+-------+-------+-------+-------+ | S4X7 | S4X6 | S4X5 | S4X4 | S4X3 | S4X2 | S4X1 | S4X0 | 08 SPRITE 4 X +-------+-------+-------+-------+-------+-------+-------+-------+ | S4Y7 | S4Y6 | S4Y5 | S4Y4 | S4Y3 | S4Y2 | S4Y1 | S4Y0 | 09 SPRITE 4 Y +-------+-------+-------+-------+-------+-------+-------+-------+ | S5X7 | S5X6 | S5X5 | S5X4 | S5X3 | S5X2 | S5X1 | S5X0 | 0A SPRITE 5 X +-------+-------+-------+-------+-------+-------+-------+-------+ | S5Y7 | S5Y6 | S5Y5 | S5Y4 | S5Y3 | S5Y2 | S5Y1 | S5Y0 | 0B SPRITE 5 Y +-------+-------+-------+-------+-------+-------+-------+-------+ | S6X7 | S6X6 | S6X5 | S6X4 | S6X3 | S6X2 | S6X1 | S6X0 | 0C SPRITE 6 X +-------+-------+-------+-------+-------+-------+-------+-------+ | S6Y7 | S6Y6 | S6Y5 | S6Y4 | S6Y3 | S6Y2 | S6Y1 | S6Y0 | 0D SPRITE 6 Y +-------+-------+-------+-------+-------+-------+-------+-------+ | S7X7 | S7X6 | S7X5 | S7X4 | S7X3 | S7X2 | S7X1 | S7X0 | 0E SPRITE 7 X +-------+-------+-------+-------+-------+-------+-------+-------+ | S7Y7 | S7Y6 | S7Y5 | S7Y4 | S7Y3 | S7Y2 | S7Y1 | S7Y0 | 0F SPRITE 7 Y +-------+-------+-------+-------+-------+-------+-------+-------+ | S7X8 | S6X8 | S5X8 | S4X8 | S3X8 | S2X8 | S1X8 | S0X8 | 10 SPRITE 8 X +-------+-------+-------+-------+-------+-------+-------+-------+ | RC8 | ECM | BMM | BLNK | RSEL | YSCL2 | YSCL1 | YSCL0 | 11 Y SCROLL +-------+-------+-------+-------+-------+-------+-------+-------+ | RC7 | RC6 | RC5 | RC4 | RC3 | RC2 | RC1 | RC0 | 12 RASTER CNT +-------+-------+-------+-------+-------+-------+-------+-------+ | LPX7 | LPX6 | LPX5 | LPX4 | LPX3 | LPX2 | LPX1 | LPX0 | 13 LITEPEN X +-------+-------+-------+-------+-------+-------+-------+-------+ | LPY7 | LPY6 | LPY5 | LPY4 | LPY3 | LPY2 | LPY1 | LPY0 | 14 LITEPEN Y +-------+-------+-------+-------+-------+-------+-------+-------+ | SE7 | SE6 | SE5 | SE4 | SE3 | SE2 | SE1 | SE0 | 15 SPRITE ENA +-------+-------+-------+-------+-------+-------+-------+-------+ | | | RST | MCM | CSEL | XSCL2 | XSCL1 | XSCL0 | 16 X SCROLL +-------+-------+-------+-------+-------+-------+-------+-------+ | SEXY7 | SEXY6 | SEXY5 | SEXY4 | SEXY3 | SEXY2 | SEXY1 | SEXYO | 17 SPR EXP Y +-------+-------+-------+-------+-------+-------+-------+-------+ | VS13 | VS12 | VS11 | VS10 | CB13 | CB12 | CB11 | | 18 VS/CB BASES +-------+-------+-------+-------+-------+-------+-------+-------+ | IRQ | | | | LPIRQ | ISSC | ISBC | RIRQ | 19 INTERRUPTS +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | MLPI | MISSC | MISBC | MRIRQ | 1A INT MASKS +-------+-------+-------+-------+-------+-------+-------+-------+ | BSP7 | BSP6 | BSP5 | BSP4 | BSP3 | BSP2 | BSP1 | BSP0 | 1B BK/SPR PRI +-------+-------+-------+-------+-------+-------+-------+-------+ | SCM7 | SCM6 | SCM5 | SCM4 | SCM3 | SCM2 | SCM1 | SCM0 | 1C MC SPR +-------+-------+-------+-------+-------+-------+-------+-------+ | SEXX7 | SEXX6 | SEXX5 | SEXX4 | SEXX3 | SEXX2 | SEXX1 | SEXX0 | 1D SPR EXP X +-------+-------+-------+-------+-------+-------+-------+-------+ | SSC7 | SSC6 | SSC5 | SSC4 | SSC3 | SSC2 | SSC1 | SSC0 | 1E SPR-SPR COL +-------+-------+-------+-------+-------+-------+-------+-------+ | SBC7 | SBC6 | SBC5 | SBC4 | SBC3 | SBC2 | SBC1 | SBC0 | 1F SPR-BK COL +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | BORD3 | BORD2 | BORD1 | BORD0 | 20 EXT COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | BK0C3 | BK0C2 | BK0C1 | BK0C0 | 21 BK0 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | BK1C3 | BK1C2 | BK1C1 | B10C0 | 22 BK1 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | BK2C3 | BK2C2 | BK2C1 | BK2C0 | 23 BK2 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | BK3C3 | BK3C2 | BK3C1 | BK3C0 | 24 BK3 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | SM0C3 | SM0C2 | SM0C1 | SM0C0 | 25 SPR MC0 +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | SM1C3 | SM1C2 | SM1C1 | SM1C0 | 26 SPR MC1 +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | S0C3 | S0C2 | S0C1 | S0C0 | 27 SPR0 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | S1C3 | S1C2 | S1C1 | S1C0 | 28 SPR1 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | S2C3 | S2C2 | S2C1 | S2C0 | 29 SPR2 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | S3C3 | S3C2 | S3C1 | S3C0 | 2A SPR3 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | S4C3 | S4C2 | S4C1 | S4C0 | 2B SPR4 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | S5C3 | S5C2 | S5C1 | S5C0 | 2C SPR5 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | S6C3 | S6C2 | S6C1 | S6C0 | 2D SPR6 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | S7C3 | S7C2 | S7C1 | S7C0 | 2E SPR7 COLOR +-------+-------+-------+-------+-------+-------+-------+-------+ VIC-III MODE REGISTERS +-------+-------+-------+-------+-------+-------+-------+-------+ D000+ | KEY7 | KEY6 | KEY5 | KEY4 | KEY3 | KEY2 | KEY1 | KEY0 | 2F KEY +-------+-------+-------+-------+-------+-------+-------+-------+ | ROM | CROM | ROM | ROM | ROM | PAL | EXT | CRAM | 30 CONTROL A | @E000 | @9000 | @C000 | @A000 | @8000 | | SYNC | @DC00 | +-------+-------+-------+-------+-------+-------+-------+-------+ | H640 | FAST | ATTR | BPM | V400 | H1280 | MONO | INT | 31 CONTROL B +-------+-------+-------+-------+-------+-------+-------+-------+ | BP7EN | BP6EN | BP5EN | BP4EN | BP3EN | BP2EN | BP1EN | BP0EN | 32 BP ENABS +-------+-------+-------+-------+-------+-------+-------+-------+ |B0AD15 |B0AD14 |B0AD13 | |B0AD15 |B0AD14 |B0AD13 | | 33 BITPLANE 0 | ODD | ODD | ODD | | EVEN | EVEN | EVEN | | ADDRESS +-------+-------+-------+-------+-------+-------+-------+-------+ |B1AD15 |B1AD14 |B1AD13 | |B1AD15 |B1AD14 |B1AD13 | | 34 BITPLANE 1 | ODD | ODD | ODD | | EVEN | EVEN | EVEN | | ADDRESS +-------+-------+-------+-------+-------+-------+-------+-------+ |B2AD15 |B2AD14 |B2AD13 | |B2AD15 |B2AD14 |B2AD13 | | 35 BITPLANE 2 | ODD | ODD | ODD | | EVEN | EVEN | EVEN | | ADDRESS +-------+-------+-------+-------+-------+-------+-------+-------+ |B3AD15 |B3AD14 |B3AD13 | |B3AD15 |B3AD14 |B3AD13 | | 36 BITPLANE 3 | ODD | ODD | ODD | | EVEN | EVEN | EVEN | | ADDRESS +-------+-------+-------+-------+-------+-------+-------+-------+ |B4AD15 |B4AD14 |B4AD13 | |B4AD15 |B4AD14 |B4AD13 | | 37 BITPLANE 4 | ODD | ODD | ODD | | EVEN | EVEN | EVEN | | ADDRESS +-------+-------+-------+-------+-------+-------+-------+-------+ |B5AD15 |B5AD14 |B5AD13 | |B5AD15 |B5AD14 |B5AD13 | | 38 BITPLANE 5 | ODD | ODD | ODD | | EVEN | EVEN | EVEN | | ADDRESS +-------+-------+-------+-------+-------+-------+-------+-------+ |B6AD15 |B6AD14 |B6AD13 | |B6AD15 |B6AD14 |B6AD13 | | 39 BITPLANE 6 | ODD | ODD | ODD | | EVEN | EVEN | EVEN | | ADDRESS +-------+-------+-------+-------+-------+-------+-------+-------+ |B7AD15 |B7AD14 |B7AD13 | |B7AD15 |B7AD14 |B7AD13 | | 3A BITPLANE 7 | ODD | ODD | ODD | | EVEN | EVEN | EVEN | | ADDRESS +-------+-------+-------+-------+-------+-------+-------+-------+ |BP7COMP|BP6COMP|BP5COMP|BP4COMP|BP3COMP|BP2COMP|BP1COMP|BP0COMP| 3B BP COMPS +-------+-------+-------+-------+-------+-------+-------+-------+ | BPY8 | BPX6 | BPX5 | BPX4 | BPX3 | BPX2 | BPX1 | BPX0 | 3C BITPLANE X +-------+-------+-------+-------+-------+-------+-------+-------+ | BPY7 | BPY6 | BPY5 | BPY4 | BPY3 | BPY2 | BPY1 | BPY0 | 3D BITPLANE Y +-------+-------+-------+-------+-------+-------+-------+-------+ | HPOS7 | HPOS6 | HPOS5 | HPOS4 | HPOS3 | HPOS2 | HPOS1 | HPOS0 | 3E HORIZ POS +-------+-------+-------+-------+-------+-------+-------+-------+ | VPOS7 | VPOS6 | VPOS5 | VPOS4 | VPOS3 | VPOS2 | VPOS1 | VPOS0 | 3F VERT POS +-------+-------+-------+-------+-------+-------+-------+-------+ DAT MEMORY PORTS +-------+-------+-------+-------+-------+-------+-------+-------+ D000+ |B0PIX7 |B0PIX6 |B0PIX5 |B0PIX4 |B0PIX3 |B0PIX2 |B0PIX1 |B0PIX0 | 40 BITPLANE 0 +-------+-------+-------+-------+-------+-------+-------+-------+ |B1PIX7 |B1PIX6 |B1PIX5 |B1PIX4 |B1PIX3 |B1PIX2 |B1PIX1 |B1PIX0 | 41 BITPLANE 1 +-------+-------+-------+-------+-------+-------+-------+-------+ |B2PIX7 |B2PIX6 |B2PIX5 |B2PIX4 |B2PIX3 |B2PIX2 |B2PIX1 |B2PIX0 | 42 BITPLANE 2 +-------+-------+-------+-------+-------+-------+-------+-------+ |B3PIX7 |B3PIX6 |B3PIX5 |B3PIX4 |B3PIX3 |B3PIX2 |B3PIX1 |B3PIX0 | 43 BITPLANE 3 +-------+-------+-------+-------+-------+-------+-------+-------+ |B4PIX7 |B4PIX6 |B4PIX5 |B4PIX4 |B4PIX3 |B4PIX2 |B4PIX1 |B4PIX0 | 44 BITPLANE 4 +-------+-------+-------+-------+-------+-------+-------+-------+ |B5PIX7 |B5PIX6 |B5PIX5 |B5PIX4 |B5PIX3 |B5PIX2 |B5PIX1 |B5PIX0 | 45 BITPLANE 5 +-------+-------+-------+-------+-------+-------+-------+-------+ |B6PIX7 |B6PIX6 |B6PIX5 |B6PIX4 |B6PIX3 |B6PIX2 |B6PIX1 |B6PIX0 | 46 BITPLANE 6 +-------+-------+-------+-------+-------+-------+-------+-------+ |B7PIX7 |B7PIX6 |B7PIX5 |B7PIX4 |B7PIX3 |B7PIX2 |B7PIX1 |B7PIX0 | 47 BITPLANE 7 +-------+-------+-------+-------+-------+-------+-------+-------+ COLOR PALETTES +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | FG/BG | RED3 | RED2 | RED1 | RED0 | 100-1FF RED +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | GRN3 | GRN2 | GRN1 | GRN0 | 200-2FF GREEN +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | BLU3 | BLU2 | BLU1 | BLU0 | 300-3FF BLUE +-------+-------+-------+-------+-------+-------+-------+-------+ COLOR/ATTRIBUTE RAM +-------+-------+-------+-------+-------+-------+-------+-------+ | UNDER | HILIT | REVRS | BLINK | INDX3 | INDX2 | INDX1 | INDX0 | D800-DBFF +-------+-------+-------+-------+-------+-------+-------+-------+ (DC00-DFFF) VIDEO BANK SELECT AND ENABLE (EN BIT MUST BE 1 FOR VB TO BE 0) +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | | | VB1 | VB0 | DD00 (WRITE) +-------+-------+-------+-------+-------+-------+-------+-------+ | | | | | | | EN1 | EN0 | DD02 (WRITE) +-------+-------+-------+-------+-------+-------+-------+-------+